Skip to content

nvidia: work around GCC 16.1.x ICE compiling flcn_ls10.c #1235

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
vs4848 wants to merge 3 commits into
base: main
Choose a base branch
from
+16 −0
Open

nvidia: work around GCC 16.1.x ICE compiling flcn_ls10.c #1235

Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
f7186bf
nvidia: work around GCC 16.1.x ICE compiling flcn_ls10.c
vs4848 Jul 10, 2026
c0c94e9
ci: add workflow to verify GCC16 flcn_ls10 fix
vs4848 Jul 10, 2026
32dddd1
ci: remove verification-only workflow before PR
vs4848 Jul 10, 2026
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
16 changes: 16 additions & 0 deletions src/nvidia/Makefile
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,22 @@ CFLAGS += -fno-common
CFLAGS += -ffreestanding
CFLAGS += -fno-stack-protector

##############################################################################
# GCC 16.1.x's instruction scheduler can crash with an internal compiler
# error (segfault during the "sched2" RTL pass) while compiling
# _flcnDmemTransfer_LS10() in flcn_ls10.c at the default optimization level.
# This is a compiler bug, not a problem with the source; disable the two
# GCC instruction-scheduling passes for this single translation unit to
# avoid triggering it, without giving up scheduling anywhere else in the
# build. See https://github.com/NVIDIA/open-gpu-kernel-modules/issues/1213
##############################################################################
FLCN_LS10_CC_TYPE := $(call GET_COMPILER_TYPE, $(CC))
ifeq ($(FLCN_LS10_CC_TYPE),gcc)
ifeq ($(shell $(VERSION_MK_DIR)/nv-compiler.sh version_is_at_least $(CC) 160000),1)
$(call BUILD_OBJECT_LIST,$(SRC_COMMON)/nvswitch/kernel/ls10/flcn_ls10.c): CFLAGS += -fno-schedule-insns2 -fno-schedule-insns
endif
endif

ifeq ($(TARGET_ARCH),x86_64)
CFLAGS += -msoft-float
CFLAGS += -mno-red-zone
Expand Down